Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications

نویسندگان

چکیده

This paper presents a dual-modular-redundancy and dual-level error-interception based triple-node-upset (TNU) tolerant latch design (namely DDETT) for safety-critical applications. The DDETT comprises two parallel single-node-upset self-recoverable cells to store values three C-elements intercept errors. Both of the are constructed from triple mutually-feeding-back 2-input C-elements, feed internal first-level error-interception. Moreover, an output-stage C-element second-level error-interception, making TNU-tolerant in that it can tolerate any possible TNU. further low-cost version latch, namely LCDDETT. LCDDETT uses dual-interlocked-storage-cells (DICEs) TNU with cost-effectiveness. Simulation results not only confirm TNU-tolerance proposed latches but also demonstrate delay-power-area products reduced by approximately 34% 58%, respectively.

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ژورنال

عنوان ژورنال: Microelectronics Journal

سال: 2021

ISSN: ['1879-2391', '0026-2692']

DOI: https://doi.org/10.1016/j.mejo.2021.105034